View SY58607U10_5652330.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

sy58607u 3.2gbps precision, 1:2 lvpecl fanout buffer with internal termination and fail safe input precision edge is a registered trademark of micrel, inc. micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1 (408) 944 - 0800 ? fax + 1 (408) 474 - 100 0 ? http://www.micrel.com august 2007 m9999 - 082907-b hbwhelp@micrel.com or (408) 955 - 1690 general description the sy58607u is a 2.5/3.3v, high - speed, fully differential 1:2 lvpecl fanout buffer optimized to provide two identical output copies with less than 20ps of skew and less than 10ps pp total jitter. the sy58607u can process clock signals as fast as 2.5ghz or data patterns up to 3.2gbps. the differential input includes micrel?s unique, 3 - pin input termination architecture that interfaces to lvpecl, lvds or cml differential signals, (ac - or dc - coupled) as small as 100mv (200mv pp ) without an y level - shifting or termination resistor networks in the signal path. for ac - coupled input interface applications, an integrated voltage reference (v ref-ac ) is provided to bias the v t pin. the outputs are 800mv lvpecl, with extremely fast rise/fall times g uaranteed to be less than 110ps. the sy58607u operates from a 2.5v 5% supply or 3.3v 10% supply and is guaranteed over the full industrial temperature range ( ? 40c to +85c). for applications that require cml or lvds outputs, consider the sy58606u and sy 58608u, 1:2 fanout buffers with 400mv and 325mv output swings respectively. the sy58607u is part of micrel?s high - speed, precision edge ? product line. datasheets and support documentation can be found on micrel?s web site at: www.micrel.com . functional block diagram precision edge ? features ? precision 1:2, 800mv lvpecl fanout buffer ? guaranteed ac performance over temperature and voltage: ? dc- to > 3.2gbps throughput ? <350ps propagation delay (in - to - q) ? <20ps within - device skew ? <110ps rise/fall times ? fail safe input ? prevents outputs from oscillating when input is invalid ? ultra - low jitter design ? <1ps rms cycle - to - cycle jitter ? <10ps pp total jitter ? <1ps rms random jitter ? <10ps pp determinis tic jitter ? high - speed lvpecl outputs ? 2.5v 5% or 3.3v 10% power supply operation ? industrial temperature range: ? 40c to +85c ? available in 16 - pin (3mm x 3mm) qfn package applications ? all sonet clock and data distribution ? fibre channel clock and data distr ibution ? gigabit ethernet clock and data distribution ? backplane distribution markets ? storage ? ate ? test and measurement ? enterprise networking equipment ? high - end servers ? access ? metro area network equipment
micrel, inc. sy58607u august 2007 2 m9999 - 082907- b hbwhelp@micrel.com or (408) 955 - 1690 ordering information (1) part number package type ope rating range package marking lead finish sy58607umg qfn -16 industrial 607u with pb - free bar - line indicator nipdau pb - free sy58607umgtr (2) qfn -16 industrial 607u with pb - free bar - line indicator nipdau pb - free notes: 1. contact factory for die availabil ity. dice are guaranteed at ta = 25c, dc electricals only. 2. tape and reel. pin configuration 16- pin qfn pin description pin number pin name pin function 1, 4 in, /in differential input: this input pair is the differential signal input to the dev ice. input accepts dc - coupled differential signals as small as 100mv (200mvpp). each pin of this pair internally terminates with 50 to the vt pin. if the input swing falls below a certain threshold (typical 30mv), the fail safe input (fsi) feature will guarantee a stable output by latching the output to its last valid sta te. see ?input interface applications? subsection. 2 vt input termination center - tap: each input terminates to this pin. the v t pin provides a center - tap for each input (in, /in) to a termination network for maximum interface flexibility. see ?input inter face applications? subsection. 4 vref -ac reference voltage: this output biases to v cc ? 1.2v. it is used for ac - coupling inputs in and /in. connect vref - ac directly to the corresponding vt pin. bypass with 0.01f low esr capacitor to vcc. maximum sink/sour ce current is 1.5ma. see ?input interface applications? subsection. 5, 8,13, 16 vcc positive power supply: bypass with 0.1uf//0.01uf low esr capacitors as close to the v cc pins as possible. 6, 7, 14, 15 gnd, exposed pad ground: exposed pad must be conn ected to a ground plane that is the same potential as the ground pins. 9, 10 11, 12 /q1, q1 /q0, q0 lvpecl differential output pairs: differential buffered copies of the input signal. the output swing is typically 800mv. unused output pair may be left flo ating with no impact on jitter. see ?lvpecl output termination? subsection.
micrel, inc. sy58607u august 2007 3 m9999 - 082907- b hbwhelp@micrel.com or (408) 955 - 1690 absolute maximum ratings (1) supply voltage (v cc ) ............................... ? 0.5v to +4.0v input voltage (v in ) ....................................... ? 0.5v to v cc lvpecl output current(i out ) continuous ....................................................... 50ma surge ............................................................. 100ma current (v t ) source o r sink on vt pin ............................. 100ma input current source or sink current on (in, /in) ................ 50ma current (v ref ) source or sink current on v ref-ac (4) .............. 1.5ma maximum operating junction temperature .......... 125c lead temperature (soldering, 20sec.) .................. 260c storage temperature (t s ) .................... ? 6 5c to +150c operating ratings (2) supply voltage (v in ) ........................ +2.375v to +3.60v ambient temperature (t a ) ................... ? 40c to +85c package thermal resistance (3) qfn still - air ( ja ) ............................................ 60c/w junction - to - board ( jb ) ......................... 33c/w dc electrical characteristics (5) t a = ? 40c to +85c, unless otherwise stated. symbol parameter condition min typ max units v cc power supply voltage range 2.375 3.0 2.5 3.3 2.625 3.6 v i cc power supply current no load, max. v cc 40 60 ma r diff_in differential input resistance (in -to - /in) 90 100 1 10 ? v ih input high voltage (in, /in) in, /in, note 7 v cc ? 1.6 v cc v v il input low voltage (in, /in) in, /in 0 v ih ? 0.1 v v in input voltage swing (in, /in) see figure 3a, note 6 0.1 1.7 v v diff_in differential input voltage swing (|in - /in|) see figure 3b 0.2 v v in_fsi input voltage threshold that triggers fsi 30 100 mv v ref - ac output reference voltage v cc ? 1.3 v cc ? 1.2 v cc ? 1.1 v in to v t 1.28 v notes: 1. permanent device damage may occur if absolute maximum ratings are exceeded. this is a st ress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. the dat a sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. package thermal resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the pcb . jb and ja values are determined fo r a 4 - layer board in still - air number, unless otherwise stated. 4. due to the limited drive capability, use for input of the same package only. 5. the circuit is designed to meet the dc specifications shown in the above table after thermal equilibrium has been established. 6. v in (max) is specified when v t is floating. 7. v ih (min) not lower than 1.2v.
micrel, inc. sy58607u august 2007 4 m9999 - 082907- b hbwhelp@micrel.com or (408) 955 - 1690 lvpecl outputs dc electrical characteristics (7) v cc = +2.5v 5% or +3.3v 10%, r l = 50 ? to v cc - 2v; t a = ? 40c to +85c, unless otherwise stated. symbol parameter condition min typ max units v oh output high voltage q0, /q0, q1, /q1 v cc - 1.145 v cc - 0.895 v v ol output low voltage q0, /q0, q1, /q1 v cc - 1.945 v cc - 1.695 v v out output volt age swing see figure 3a 550 800 950 mv v diff_out differential output voltage swing see figure 3b 1100 1600 mv notes: 7. the circuit is designed to meet the dc specifications shown in the above table after thermal equilibrium has been established .
micrel, inc. sy58607u august 2007 5 m9999 - 082907- b hbwhelp@micrel.com or (408) 955 - 1690 ac electrical characteristics v cc = +2.5v 5% or +3.3v 10%, r l = 50 ? to v cc - 2v, input t r /t f : < 300ps; t a = ? 40c to +85c, unless otherwise stated. symbol parameter condition min typ max units f max maximum frequency nrz data 3.2 4.25 gbps v out > 400mv clock 2.5 3 ghz t pd propagat ion delay in -to - q v in : 100mv - 200mv 180 300 450 ps v in : 200mv - 800mv 150 230 350 ps t skew within device skew note 8 4 20 ps part -to - part skew note 9 135 ps t jitter data random jitter note 10 1 ps rms determ inistic jitter note 12 10 ps pp clock cycle - to - cycle jitter note 13 1 ps rms total jitter note 13 10 ps pp t r, t f output rise/fall time (20% to 80%) at full output swing. 40 75 110 ps duty cycle differential i/o 47 53 % notes: 8. within device skew is measured between two different outputs under identical input transitions. 9. part - to - part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at t he respect ive inputs. 10. random jitter is measured wi th a k28.7 pattern, measured at f max . 11. deterministic jitter is measured at 2.5gbps with both k28.5 and 2 23 ? 1 prbs pattern. 12. cycle - to - cycle jitter definition: the variation period between adjacent cycles over a random sample of adjacent cycle pairs. t jitter _ cc = t n ? t n+1 , where t is the time between rising edges of the output signal. 13. total jitter definition: with an ideal clock input frequency of f max (device), no more than one output edge in 10 12 output edges will deviate by more than the spec ified peak - to - peak jitter value.
micrel, inc. sy58607u august 2007 6 m9999 - 082907- b hbwhelp@micrel.com or (408) 955 - 1690 functional description fail - safe input (fsi) the input includes a special failsafe circuit to sense the amplitude of the input signal and to latch the outputs when there is no input signal present, or when the amplitude of the input signal drops sufficiently below 100mv pk (200mv pp ), typically 30mv pk . maximum frequency of sy58607u is limited by the fsi function. input clock failure case if the input clock fails to a floating, static, or extremely low signal swing, the f si function will eliminate a metastable condition and guarantee a stable output. no ringing and no undetermined state will occur at the output under these conditions. note that the fsi function will not prevent duty cycle distortion in case of a slowly det eriorating (but still toggling) input signal. due to the fsi function, the propagation delay will depend on rise and fall time of the input signal and on its amplitude. refer to ?typical characteristics? for detailed information. timing diagrams fig ure 1a. propagation delay figure 1b. fail safe feature
micrel, inc. sy58607u august 2007 7 m9999 - 082907- b hbwhelp@micrel.com or (408) 955 - 1690 typical characteristics v cc = 3.3v, gnd = 0v, v in = 100mv, r l = 50 ? to v cc - 2v, t a = 25c, unless otherwise stated.
micrel, inc. sy58607u august 2007 8 m9999 - 082907- b hbwhelp@micrel.com or (408) 955 - 1690 functional characteristics v cc = 3.3v, gnd = 0v, v in = 400 mv, data pattern: 2 23 - 1, r l = 50 ? to v cc - 2v, t a = 25c, unless otherwise stated.
micrel, inc. sy58607u august 2007 9 m9999 - 082907- b hbwhelp@micrel.com or (408) 955 - 1690 functional characteristics (continued) v cc = 3.3v, gnd = 0v, v in = 400mv, r l = 50 ? to v cc - 2v, t a = 25c, unless otherwise stated.
micrel, inc. sy58607u august 2007 10 m9999 - 082907- b hbwhelp@micrel.com or (408) 955 - 1690 in put and output stage figure 2a. simplified differential input buffer figure 2b. simplified lvpecl output buffer single- ended and differential swings figure 3a. single - ended voltage swing figure 3b. differential voltage swing
micrel, inc. sy58607u august 2007 11 m9999 - 082907- b hbwhelp@micrel.com or (408) 955 - 1690 input int erface applications figure 4a. cml interface (dc - coupled) option: may connect v t to v cc figure 4b. cml interface (ac - coupled) figure 4c. lvpecl interface (dc - coupled) figure 4d. lvpecl interface (ac - coupled) figure 4e. lvds interface
micrel, inc. sy58607u august 2007 12 m9999 - 082907- b hbwhelp@micrel.com or (408) 955 - 1690 lvp ecl output termination lvpecl outputs have very low output impedance (open emitter), and small signal swing which results in low emi. lvecl is ideal for driving 50 ? - and - 100 ? - controlled impedance transmission lines. there are several techniques in terminati ng the lvpecl output, as shown in figures 5a through 5c. figure 5b. three - resistor ?y - termination? figure 5a. parallel termination - thevenin equivalent related product and support documents part number function data sheet link sy58606u 4.25gbps precision, 1:2 cml fanout buffer with internal termination and fail safe input http://www.micrel.com/page.do?page=/product - info/products/sy58606u.shtml sy58608u 3.2gbps precision, 1:2 lvds fanout buffer buffer with internal termination and fail safe input http://www.micrel.com/page.do?page=/product - info/products/sy58608u.shtml hbw solutions new products and termination application notes http://www.micrel.com/page.do?page=/product - info/as/hbwsolutions.sht ml r1
micrel, inc. sy58607u august 2007 13 m9999 - 082907- b hbwhelp@micrel.com or (408) 955 - 1690 package information 16- pin qfn micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel +1 (408) 944 - 0800 fax +1 (408) 474 - 1000 web http://www.micrel.com the information furnished by micrel in this data sheet is believed to be accurate and reliable. however, no responsibility is assumed by micrel for its use. micrel reserves the right to change circuitry and specif ications at any time without notification to the customer. micrel products are not designed or authorized for use as components in life support appliances, devices or systems where mal function of a product can reasonably be expected to result in personal injury. life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to res ult in a significant injury to the user. a purchaser?s use or sale of micrel products for use in life support appliances, devices or systems is a purchaser?s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 2006 micrel, incorporated.

▲Up To Search▲

Price & Availability of SY58607U10

	To Download SY58607U10 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .